This invention relates generally to semiconductor device fabrication, and more particularly to wafer trays on which semiconductor wafers are placed for processing for such fabrication.
In semiconductor device fabrication, doping is a frequently used process. Doping is the introduction of an impurity, the dopant, into the crystal lattice of a semiconductor to modify its electronic properties. For example, adding boron to silicon makes the material a p-type material. The dopant is thus an element that alters the conductivity of a semiconductor by contributing either a hole or an electron to the conduction process. In thermal diffusion, dopant atoms diffuse into the wafer surface by heating the wafer, and exposing it to vapors containing the desired dopant. In ion implantation, selected dopants are introduced by high-voltage ion bombardment to achieve desired electronic properties in defined areas.
Ion implantation has largely replaced thermal diffusion for doping, due to its inherent better doping control. However, ion implantation needs a follow-on heating operation, called annealing, to cure out crystal damage induced by the implant process. Annealing has traditionally been accomplished in a tube furnace. Although the heating anneals out the crystal damage, it also causes the dopant atoms to spread out in the wafer, which is undesirable. As a result, rapid thermal processing (RTP), such as rapid thermal annealing (RTA), technologies have been developed to supplant tube furnace utilization.
RTP and RTA technology is based on the principle of radiation heating. The semiconductor wafer is placed in a chamber fitted with gas inlets and exhaust outlets. Inside, a heat source above, and possibly below, the wafer provides the rapid heating. Heat sources include graphite heaters, microwave, plasma arc, and tungsten halogen lamps. The radiation from the heat source couples into the wafer surface and brings it up to a process temperature at rates of 75 to 125xc2x0 C. per second. Cooling likewise occurs in seconds. With radiation heating, because of its short heating times, the body of the wafer never rises to the processing temperature. For ion implantation annealing, this means that crystal damage is annealed while the implanted atoms stay in their desired original locations.
FIG. 1 shows an exploded view of an example RTP or RTA assembly 100. The assembly 100 includes a reactor block 102 that has side lamps 104 which heat the wafer on the wafer tray 106. The wafer tray 106 is inserted inside a quartz tube 108 that fits inside the reactor block 102, where the quartz tube 108 enables the heat from the side lamps 104 to reach the wafer on the wafer tray 106. A compression plate 110 seals the quartz tube 108 in the radiator block 102. A door aperture 112 closes to seal the wafer tray 106 inside the quartz tube 108, once the wafer tray 106 has been inserted into the quartz tube 108 in the radiator block 102.
FIG. 2 shows a side cross-sectional view of the assembly 100. Gas is inlet through the inlet 204 of the radiator block 102, and is distributed over the wafer 206 on the wafer tray 106. The radiator block may be water-cooled. The quartz tube 108 surrounds the wafer tray 106 as before, and the wafer tray 106 has slip-guard rings 210 and 212 to desirably prevent slippage of the wafer 206. A window 208 lies within the bottom side of the quartz tube 108, to assist the light from the lamps 104 in heating the wafer 206. An inlet in the top of the radiator block 102 allows for additional nitrogen or air, or another gas, to be inserted as needed. A temperature sensor 212, such as a pyrometer, accomplishes temperature measurement. An outlet 214 allows exit of the exhaust gases. The door aperture 112 seals the wafer 206 within the radiator block 102 as before, and has o-ring seals 216 and 218 to assist its sealing.
A disadvantage to existing RTA and RTP assemblies, such as the assembly 100 of FIGS. 1 and 2, and such as those available from Advanced Semiconductor Technologies (AST), Ltd., of Ra""anana, Israel, is that they do not provide a wafer-positioning system (WPS). This means that semiconductor wafers cannot be precisely placed within the RTA and RTP assemblies, and their positions within the assemblies cannot also be maintained. However, RTA and RTP are processes that are very sensitive to the position of the wafer, especially its relation to the lamps of the assemblies. As a result, existing RTA and RTP assemblies often suffer from unstable temperature profiles, due to the semiconductor wafers being out of position inside the reactor blocks of the assemblies. This can cause problems within the RTA and RTP processes themselves.
Therefore, there is a need for semiconductor wafer tray positioning that overcomes these disadvantages. Specifically, there is a need for semiconductor wafer tray positioning that allows for more precise placement of semiconductor wafers within RTA and RTP assemblies. Such wafer tray positioning should ensure stable temperature profiles of the assemblies, as well as ensure process uniformity. For these and other reasons, there is a need for the present invention.
The invention relates to semiconductor wafer tray positioning. A housing, such as a quartz tube, to receive a wafer tray includes at least four positioning kits. Each positioning kit includes a primary outside edge and an inside edge. The primary outside edge at least substantially corresponds to an interior sidewall of the housing. The inside edge is opposite of the primary outside edge, and has a groove that at least substantially corresponds to a part of a frame of the wafer tray. The groove is receptive to the part of the frame of the wafer tray, to assist maintaining the wafer tray in a stable position when the tray is completely positioned in the housing.
The invention provides for advantages over the prior art. More precise placement of semiconductor wafers within rapid thermal annealing (RTA) and rapid thermal processing (RTP) assemblies is achieved by using the positioning kits of the invention. Use of the positioning kits to achieve such precise placement of wafers ensures stable temperature profiles of the assemblies, leading to process uniformity. Still other advantages, aspects, and embodiments of the invention will become apparent by reading the detailed description that follows, and by referencing the accompanying drawings.